Semi-conductor components, for instance corresponding integrated (analog and/or digital) computer circuits, semi-conductor memory components, for instance functional memory components (PLAs, PALs, etc.) and table memory components (e.g. ROMs or RAMs, in particular SRAMs and DRAMs) are subjected to extensive testing during the manufacturing process.
For the simultaneous, combined manufacture of numerous (generally identical) semi-conductor components, a so-called wafer (i.e. a thin disk of monocrystalline silicon) is used. The wafer is appropriately treated (for instance subjected in succession to numerous coating, exposure, etching, diffusion and implantation process steps, etc.), and then for instance sliced up (or scored and snapped off), so that the individual components become available.
During the manufacture of semi-conductor components (for instance DRAMs (Dynamic Random Access Memories and/or dynamic read-write memories), in particular of DDR-DRAMs (Double Data Rate—DRAMs and/or DRAMs with double data rate)) semi-completed components (still on the wafer) can be subjected—even before the above process steps required for the wafer have been completed (i.e. even while the semi-conductor components are still in a semi-complete state), to appropriate test processes at one or more test stations (for instance the so-called kerf measurements at the wafer scoring frame) with the aid of one or more testing apparatuses.
After completion, (i.e. after completion of all the above wafer processing steps) the semi-conductor components are subjected to further test procedures at one or more (further) test stations—completed components can for instance be appropriately tested with the aid of corresponding (additional) test equipment (“slice tests”).
After the wafers have been sliced up (and/or scored and snapped off), the—individually available—components are then each loaded onto a so-called carrier (i.e. a suitable mounting), whereupon the semi-conductor components—loaded onto the carrier—can be subjected to one or several (further) test procedures corresponding with other test stations.
In the same way, one or more further tests (at corresponding test stations and with the use of appropriate additional test equipment) can be performed, for instance after the semi-conductor components have been mounted onto the corresponding semi-conductor component housing, and/or for instance after the semi-conductor component housing (together with the semi-conductor components mounted onto it in each case) has been mounted (for so-called module tests) into a corresponding electronic module.
While testing the semi-conductor components, the so-called “DC test” and/or for instance the so-called “AC test” may be applied as a test procedure (for instance for the above slice tests, module tests, etc.) in each case.
For the DC test for instance, a particular voltage (or current)—at a certain fixed level—can be applied to the appropriate connection of a semi-conductor component to be tested, whereafter the level of the—resulting—current (and/or voltage) can be measured—in particular to ascertain whether this current (and/or voltage) falls within certain predetermined desired critical limits.
During an AC test in contrast, voltages (or currents)—in particular appropriate test sample signals—at varying levels can for instance be applied to the appropriate connections of a semi-conductor component, with the aid of which appropriate function tests can be performed on each corresponding semi-conductor component.
With the help of the above test procedures defective semi-conductor components can be identified and removed (or possibly even repaired).
Furthermore the results obtained in the above tests can for instance also be used to improve and/or optimize the process steps applied during the manufacture of the semi-conductor components (for instance the coating, exposure, etching, diffusion and/or implantation process steps, etc.) thereby improving the yield of such semi-conductor components during manufacture.
In order to achieve this, an attempt must be made to ascertain from the results obtained in the above tests what the—physical—causes of any possibly occurring faults may be.
This is generally done manually—in conventional processes—and usually always by—individually—examining the results obtained from each of the above tests.
Such a—manual—evaluation of test results for improved/optimized yield is time-consuming and expensive and often leads to unsatisfactory results.